[Master Thesis] Nn-X a hardware accelerator for convolutional neural networks

In this thesis we present nn-X, a scalable custom hardware architecture that is capable of processing convolutional neural networks in real time. nn-X is a low-powered mobile system for accelerating convolutional neural networks. The nn-X system comprises a host processor, a coprocessor and memory. The nn-X coprocessor efficiently implements pipelined operators and exploits a large amount of parallelism to deliver very high performance per unit power consumed. The prototyping platform used in this work consumes 8 W of power for the entire platform and only 3 W for the nn-X system and memory.
http://www.mediafire.com/file/gs7zovlrrm3cbh8/%5BNn-X_-_a_hardware_accelerator_for_convolutional_neural_networks.pdf

 

Advertisements

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s