[Phd Thesis] Design Methodologies and Architectures for Digital Signal Processing on FPGAs

This thesis develops innovative architectures and methodologies to exploit FPGA resources effectively. Specifically, it introduces an efficient method of implementing FIR filters on FPGAs that can be used as basic building blocks to make various types of DSP filters. Secondly, it introduces a novel implementation of correlation function (using embedded memory) that is vastly used in image processing applications. Furthermore, it introduces an optimal data placement algorithm for power consumption reduction on FPGA embedded memory blocks. These techniques are more efficient in terms of power consumption, performance and FPGA area and they are incorporated into a number of signal processing applications. A few real life case studies are also provided where the above techniques are applied and significant performance is achieved over software based algorithms. The results of such implementations are also compared with competing methods and trade-offs are discussed. Finally, the challenges and suggestions of integrating such methods ofoptimizations into FPGA design tools are discussed.



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